1. Field
Example embodiments relate to a semiconductor memory device, and for example, to a flash memory device.
2. Description of Related Art
Various technologies have been proposed to improve program performance of a memory system with a flash memory device. One of the proposed technologies provides a cache function to a page buffer of a flash memory device. The proposed technology provides cache function by including two latches (e.g., a main latch and a cache latch) in one page buffer. According to a conventional cache program operation, data to be programmed is loaded from a memory controller into the cache latch, and the data loaded in the cache latch is dumped into the main latch. A program operation is performed according to the data dumped into the main cache. During the program operation, the next data to be programmed is loaded from the memory controller into the cache latch.
FIG. 1 illustrates a program operation of a conventional flash memory device. Referring to FIG. 1, in a conventional flash memory device with the cache function, general program operations may be performed instead of the cache program operation. If general program operations are performed instead of the cache program operation, as mentioned above, data to be programmed is loaded from the memory controller into the cache latch, and the data loaded in the cache latch is dumped into the main latch. If the program operation fails, as illustrated in FIG. 1, data to be programmed is reloaded from the memory controller into the cache latch, and the reloaded data in the cache latch is dumped into the main latch. A reprogram operation is performed according to the reloaded data dumped into the main latch.